Large signal analysis of MOS differential pairs

In this section, an expression for the current in terms of the voltage difference is deduced. Referring to Figure 5.1 and assuming that both transistors operate in saturation, Equation (3.2) results in
  
denotes the current factor common to the transistors, and V_S is the potential of the common source node. The first step in the analysis is to solve Equations (5.1-5.2) with respect to V_S. Addition of these equations gives
  
Note that in the solution of the equation of the second degree (5.3), only the negative solution for V_S+V_T is relevant. The positive solution corresponds to transistors operating in the cut-off region. is determined by subtracting Equation (5.2) from Equation (5.1), and inserting Equation (5.4):
 
This expression holds provided both transistors conduct current and operate in saturation. Imagine, that the loads of the stage assure, that the transistors remain saturated. When e.g. V_GS2=V_T, the stage will `cut'. In this case, the current 2I is drawn through M₁, and V_GS1 is
 
is defined as the maximum input voltage, for which Equation (5.5) still holds. Note that is times the quiescent effective gate voltage, V_GS-V_T, common to the transistors at the operating point (i.e. when ). Expression (5.5) for may be rewritten as
 
At the operating point (), the transconductance of the differential pair, G_M0, is determined by differentiation of Equation (5.7) with respect to :
 
In these formulas, V_GS denotes the common gate-source voltage of the transistors at the operating point, and g_m denotes the transistor transconductance.

Figure 5.2 shows the output current for a maximum input voltage of 1V. The transistor current factors are 100. From Equation (5.6), .

  
Figure 5.2: MOS differential pair output current as a function of input voltage .