...circuitry
This is often called mixed analog-digital design.




...a
8#8 denotes the standard deviation of parameters. Accepting parts within 7#7 of the target parameter will maximise the yield of the processing[WE92].




...resistors
A unit resistor is a resistor of a specific geometry. The unit resistor has resistance 13#13, and any multiples of this value may be realised using a (natural) number of unit resistors.




...gives
0.1dB corresponds to 1.16%: 20#20




...variations
The term local implies that the region affected by the variation is `small'. Typically , the affected area is less than 9#9.




...used
See [O'L91]. The data have been compiled for a 31#1 CMOS process. Note that such data are process dependent, but the above guidelines may be used in the absence of more precise data.




...processing
Anisotropic processing, i.e. the processing speed differs with the crystal orientation, is the rule rather than the exception for small geometry processes.




...layout
The first moment of area is equal for the components which are matched.




...possible
Any process gradient may be approximated by the Taylor series in a small region around the origin. If the region is small, the approximation holds the best.




...ADC
The resistor was not laid out using common centroid techniques, but still demonstrated worst case matching better than 0.2%. We believe that the errors due to contact impedance in a common centroid layout structure would have been comparable.




...areas
The differences in field oxide thicknesses drawn in Figure 2.10 are deliberately exaggerated to underline the effect.




...by
55#55 denotes the sheet resistance of the resistor.




...impedance
In a typical 57#57 CMOS process, the well is 58#58's deep. If the side diffusion is approximately 70%, the area of curvature is roughly 59#59 long. The doping concentration in the area of curvature is lower than in the rest of the well area.




...N+
First, the effect of the curvature on resistance value is eliminated by avoiding the corners. Second, extending the well sufficiently means that N+ is not over the area of curvature even in case of misalignment.




...dependence
Transistors, resistors etc. Almost any parameter shows temperature dependence.




...saturated
The small-signal equivalent diagram is formed by observing the changes in the currents caused by small changes in the terminal voltages (VGS, VBS and VDS).




...complicated
A thorough analysis of the problem may be found in [Tsi93].




...VGS-VT
Note that for values of VGS-VT below 50-100mV, the transistor operates in the subthreshold region, and the usual expressions for the channel current no longer hold.




...1V
The dotted curves show what happens to the current, when the expression no longer holds.




...required
E.g. modem front ends.




...process
For a P-Well process, the VDD must be common external to the circuit. For twin-well processes, the doping of the substrate must be carefully considered.




...supplies
A double bond is often desired for supplies. If a pad has already got a double bond, then a third bond is usually not permitted.




...is
Equation 6.2 can be used with relatively little error for almost all printed circuit board connections.




...nodes
E.g. the output nodes of an operational transconductance amplifier (OTA), or the compensation node of an internally compensated operational amplifier.




...capacitor
In a double poly-layer process.




...lines
The recommendation is for an N-well process.




...switches
This is often called clock feedthru.





























Flemming Stassen (assoc. professor)
Wed Jan 21 13:35:14 MET 1998