Any process parameter displays local variations
. The variations are randomly
distributed over the entire die, and their placement can not be predicted.
For example, the capacitor oxide thickness varies over the die.
Also, etching displays a random variation at the edge. Both of these factors
result in a capacitor value with a random distribution. Such effects are
found for resistors, capacitors, and transistors. Additionally, resistors
and transistors also depend on doping implants and diffusions.
In general, better matching be achieved for capacitors than for either
resistors or transistors (with the same area), because less mechanisms
influence the capacitor matching.
The only effective way of reducing the influence of local process errors
is to ensure that any precision element is sufficiently large, that the
local process variations only play a minor role in the achievable matching.
A survey on capacitor matching in a specific process concluded, that local
oxide thickness variations were negligible, if the capacitors were larger
than 
[McC81].
For resistors, the following rules of thumb can be used.
Precision poly-silicon resistors and diffusion resistors should never be
laid out with line widths less than 
. For well resistors, a minimum
line width of 
should be used. The later results from the fact that
the well junction is deeper than normal diffusion junctions, making the
device more susceptible to three dimensional errors. This the reason
for requiring wider well resistors. Current sources requiring precision
matching should never use minimum geometries.