Lectures 7 through 9: Design of CMOS circuits



Lecture 7: Combinational circuit design

Purpose: To present and discuss different dynamic logic configurations
Contents:
Principles of static CMOS: compound gates and P/N ratios
Principles of static CMOS: Precharge and evaluation
Domino logic
np-CMOS logic
Design issues of dynamic logic and Composition rules
Literature:
Weste & Harris sections 6.1 - 6.5
Supplementary reading:
J.M. Rabaey, A. Chandrakasan and B. Nikolic:
Digital Integrated Circuits - A Design Perspective,
2nd edition, Prentice Hall, 2003,
Sections 6.3 - 6.5



Lecture 8: Sequential circuits - sequencing

Purpose: To discuss the design of synchronous sequential systems using static elements
Contents:
Timing metrics: setup time tsu, hold time thold, contamination delay tcd
Memory elements: latches and registers
Static memory elements
Metastability
Clock systems: clock skew and clock overlap
Literature:
Weste & Harris sections 7.1 - 7.2
Supplementary reading:
J.M. Rabaey, A. Chandrakasan and B. Nikolic:
Digital Integrated Circuits - A Design Perspective,
2nd edition, Prentice Hall, 2003,
Sections 7.1 - 7.2



Lecture 9: Sequential circuits - clocked systems

Purpose: To discuss the design of synchronous sequential systems using dynamic elements
Contents:
Dynamic memory elements
Clock skew
C2MOS logic
True single-phase clocked logic
Pipelining: latches and registers
NORA-CMOS logic style for pipelined structures
Literature:
Weste & Harris sections 7.3 - 7.5
Supplementary reading:
J.M. Rabaey, A. Chandrakasan and B. Nikolic:
Digital Integrated Circuits - A Design Perspective,
2nd edition, Prentice Hall, 2003,
Sections 7.3, 7.5, 7.6.1




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Associate professor Flemming Stassen, stassen@imm.dtu.dk