This course is a follow up of Digital Electronics 1 for students of Electrical Engineering at DTU, but can also be taken from other study lines.
To provide the participants with the competencies necessary to design digital circuits that perform simple calculations or control tasks using typical simulation and synthesis tools and to implement these circuits using reconfigurable hardware (FPGA technology).
The course is intended for students enrolled in the bachelor program in electrical engineering or bachelor students from software engineering with an interest in hardware design. Knowledge on following topics is a prerequisite:
Depending on your background the prerequisites are covered in one of the following courses:
The course is lectured Thursday afternoons 13:00 - 17:00. The course is lectured in English.
First part is usually lectures and second part is reserved for project work. Students will work in groups of two or three on small lab exercises and as a final project on a vending machine.
The course is lectured B308-A013 and the labs are in B308-IT127, B308-IT017.
In all Dally sections ignore VHDL code
The Dally book is available from Polyteknisk Boghandel in Building 101A. The Schoeberl book is open access and freely available.
This lecture plan may change during the semester, adapting to the current teaching situation.
Topics: Introduction and motivation, languages for hardware design, testing (see 2.1.4), tools and setup, a first round in Chisel
Reading: Chisel: 1, 2, Dally: 2.1.4
Optional reading: Dally: 1, 2
Lab: Chisel “Hello World”
Topics: Recap combinational and synchronous circuits with Chisel code (including comparison with VHDL)
Reading: Dally 8, 14.1, 14.2 and Chisel 5
Lab: Combinational circuits in Chisel
Topics: Composing circuits out of components, sequential building blocks, using CLI
Reading: Dally: 16.1 and 16.2 Chisel: 3.1, 3.2, 4 and 6
Lab: Components and sequential circuits
Topics: Delay and Power, Timing, and Metastability
Slides: in DTU Learn
Reading: Dally: 15.1-15.6, and 28.1-28.4
Optional reading: Dally: 5.1-5.4 (replaced by slides)
Lab: 15.1, 15.10, 15.11, 15.12, 15.19, 15.20, 15.21
Topics: Sequential building blocks, testing and verification in Chisel, waveform viewing
Reading: Dally: 2.1.4 and 20, Chisel: 3
Lab: A Simple Tester
Topics: State machine (repetition) and the coding in Chisel
Reading: Dally: 14.3-14.5, Chisel: 8 (2nd edition)
Lab: Hexadecimal to 7-segment decoder
Topics: State machine and datapath (FSMD)
Reading: Dally: 16.3, 29.1-29.3, Chisel: 9.2 (2nd edition)
Lab: Dally 14.3, 14.5 (Sketch a Chisel implementation on paper), 14.28, Sketch a Chisel implementation on paper for 14.28
Topics: Refactoring of state machines, input processing, reset
Reading: Dally: 17, Chisel: 7, 9.1
Lab: Multiplexed Seven-Segment Display
Topics: Ready/valid interface, and hardware generators
Reading: Dally: 22, Chisel: 9.3
Lab: Using a UART Component
Lab: Testing a Vending Machine
Topics: Interfaces, memory, and serial interface plus repetition on testing
Reading: Dally: 24 Chisel: 6.4
Lab: The Vending Machine
Lab: The Vending Machine
Topics: Lipsi as a simple processor, Discussion of course, and followup courses
Lab: Finish vending machine and report