In CMOS technology, the basic memory element is the D-type latch (the level-controlled flip-flop). In this applet, the latch is realized using transmission gates and inverters, using a total of 8 transistors, in a pseudo-static realization using both the clock and inverted clock signals.

• Click near the D input to select the data input value for the D-latch.
• Click near the C (clock) or NC (inverted clock) input to toggle the current clock input value.
• The current values for data input D, clock input C, and data output Q are plotted as waveforms on the bottom of the applet. This allows to demonstrate the data storage in the latch when the C input is '0'.
• If you click anywhere else, the input voltages are not changed. However, simulation time is increased, and the waveforms are updated.

---

Top of demo         Modified by Flemming Stassen on 26 August 1999     stassen@imm.dtu.dk

---