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Demo: CMOS Inverter |
The basic CMOS gate is the CMOS inverter. The CMOS inverter consists of
only two transistors, one N-type and one P-type transistor.
This applet illustrates how the inverter works.
The voltage level on a floating wire on the input of the inverter may
reach some undefined voltage between VCC and GND after some time due
to parasitic effects. Such a floating wire will cause problems, when
the voltage is in the vicinity of VDD/2.
At this voltage, both N-type and P-type transistors are conducting.
The main advantage of CMOS over NMOS and bipolar technologies is the low
static power dissipation. Unlike NMOS or bipolar circuits, a CMOS circuit
has almost no static power dissipation. Power is only dissipated when the
circuit switches.
The applet illustrates why a floating wire is a serious problem:
When both transistors are conducting, there is a direct path from
VDD to GND, and this implies a short-circuit condition.
In this case, the inverter which dissipates more power than usual,
and the device may be destroyed.
Click anywhere in the applet to toggle the input voltage for the
inverter from GND to VDD to Z (unknown) to GND:
