Softwareteknologi DTU - Project No. 0111:  Hit-in-hardware miss-in-software cache memory
Danmarks Tekniske Universitet DTU
Bachelorprojekt - Softwareteknologi
Project No. 0111:  Hit-in-hardware miss-in-software cache memory
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Description:

The purpose of a cache memory is to provide fast access to memory. Cache hits must therefore be supported in hardware. In a conventional cache, misses are also handled in hardware. In this project we will explore an alternative: Instead of stalling the CPU during a miss, the CPU itself could execute a small cache miss exception handler program. The result is simpler hardware, increased flexibility and (hopefully) a modest performance decrease. In cache-coherent multi-processor-systems, the perspectives are more profound, because of the very complex cache miss protocols used in such systems.

Explore and evaluate concept. Implement prototype using a simple existing MIPS-like processor. Code in VHDL and implement on FPGA.

Prerequisites:  02155 Computer Architecture
Knowledge of digital design, eg. course no. 02154, 02139 or 02203

Supervisor(s) Jens Sparsø

Sidst opdateret: Nov 28, 2013 af Hans Henrik Løvengreen