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| Bachelorprojekt - Softwareteknologi | Project No. 0085: Cache controller on a FPGA |
| Aktuelle | Tidligere |
The ESE section is involved in researching future multi-core and many-core processor architectures. As part of that work, a custom processor core optimized for FPGA implementation was designed. The focus of this thesis is to design a cache controller for the mentioned processor core. The functionality of the cache controller covers the translation of virtual addresses into physical addresses and to request/supply data between processor core and memory controller. This thesis includes hardware design on FPGA and simple assembler programming for verifying the functionality of the cache controller.
| Prerequisites: | The candidate may need experience with hardware prototyping in FPGA and very basic knowledge in assembler programming. |
Supervisor(s) Sven Karlsson
| Sidst opdateret: Oct 31, 2011 af Hans Henrik Løvengreen |