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| Bachelorprojekt - Softwareteknologi | Project No. 0084: SDRAM memory controller on a FPGA |
| Aktuelle | Tidligere |
The ESE section is involved in researching future multi-core and many-core processor architectures. As part of that work, a custom processor core optimized for FPGA implementation was designed. The focus of this thesis is to design an SDRAM memory controller on a FPGA. The memory controller is intended to be connected to the mentioned processor core, which will not be part of the thesis. Xilinx provides various memory controllers that are able to handle all kinds of memories and user interfaces; in consequence those controllers are very slow. The focus of this thesis will be to design a fast but less flexible SDRAM memory controller on a Virtex-5 FPGA platform.
| Prerequisites: | The candidate needs experience with hardware prototyping in FPGA. |
Supervisor(s) Sven Karlsson
| Sidst opdateret: Oct 31, 2011 af Hans Henrik Løvengreen |