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| Bachelorprojekt - Softwareteknologi | Projekt nr. 0034: JTAG based Hardware Debugger |
| Aktuelle | Tidligere |
A vital part of implementing complex software on embedded programmable platforms is the presence of a hardware debugger which allows the programmer to have full control of the applications being executed (single stepping, break point support etc.) as well as direct access to registers and data memory values.
The project focuses on the design and implementation of a generic hardware debugger architecture. The capabilities of the implemented debugger architecture should be demonstrated by adding hardware debug support to a small processor developed at ICEpower.
The hardware debugger must support communication via JTAG. Thus, a JTAG interface (TAP-port) must be implemented in Verilog including hardware which supports boundary scan chains.
Software running on a PC, using Windows XP for controlling the hardware debugger, must be developed as well, i.e. finding/developing drivers for communicating with JTAG devices and a simple control application e.g. for setting break points and displaying register and memory values. The PC should preferably be connected to the test chip via an USB-to-JTAG cable.
Project Contents / Research Areas:
The focus will be on a combined theoretical / practical approach. The resulting hardware debugger will be demonstrated on an existing XILINX FPGA HW board.
Vejleder(e): jan Madsen
| Sidst opdateret: Oct 31, 2011 af Hans Henrik Løvengreen |