2012
W. Liu and A. Nannarelli. "Power Efficient Division and Square Root Unit", IEEE Transactions on Computers (to appear). Preprints available at IEEE Transactions on Computers PrePrints2011
A. Nannarelli. "Radix-16 Combined Division and Square Root Unit", Proc. of 20th IEEE Symposium on Computer Arithmetic, p. 169-176, Tubingen, Germany. 25-27 July 2011.A. Nannarelli. "FPGA Based Acceleration of Decimal Operations", Proc. of International Conference on ReConFigurable Computing and FPGA's , p. 146-151, Cancun, Mexico. 30 Nov.-2 Dec. 2011.
A. T. Winther, W. Liu, A. Nannarelli and S. Vrudhula. "Temperature Dependent Wire Delay Estimation in Floorplanning", Proc. of 2011 Norchip Conference, Lund, Sweden. 14-15 Nov. 2011.
N. Borup, J. Dindrop and A. Nannarelli. "FPGA Implementation of Decimal Processors for Hardware Acceleration", Proc. of 2011 Norchip Conference, Lund, Sweden. 14-15 Nov. 2011.
P. Albicocco, G.C. Cardarilli, A. Nannarelli, M. Petricca and M. Re. "Degrading precision arithmetics for low-power FIR implementation", Proc. of 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS), Seoul, South Korea. 7-10 Aug. 2011.
2010
W. Liu, A. Calimera, A. Nannarelli, E. Macii, M. Poncino. "Post-placement Temperature Reduction Techniques", 2010 Design Automation and Test in Europe Conference (DATE 2010), p. 634-637. Dresden, Germany. March 2010.W. Liu and A. Nannarelli. "Power Dissipation Challenges in Multicore Floating-Point Units", 21st IEEE International Conference on Application-specific Sy stems, Architectures and Processors (ASAP 2010), p. 257-264. Rennes, France. July 2010.
W. Liu and A. Nannarelli. "Temperature Aware Power Optimization for Multicore Floating-Point Units", Proc. of 44th Asilomar Conference on Signals, Systems, and Computers, p. 1134-1138. Pacific Grove (CA), USA. Nov. 2010.
G.C. Cardarilli, A. Nannarelli, Y. Oster, M. Petricca, M. Re. "Design of Large Polyphase Filters in the Quadratic Residue Number System", Proc. of 44th Asilomar Conference on Signals, Systems, and Computers, p. 410-413. Pacific Grove (CA), USA. Nov. 2010.
M. Petricca, G.C. Cardarilli, A. Nannarelli, M. Re, P. Albicocco. "Degrading Precision Arithmetic for Low Power Signal Processing", Proc. of 44th Asilomar Conference on Signals, Systems, and Computers, p. 1163-1167. Pacific Grove (CA), USA. Nov. 2010.
[book chap.] G.C. Cardarilli, A. Nannarelli, M. Re. "On the Comparison of Different Number Systems in the Implementatio n of Complex FIR Filters", VLSI-SoC: Design Methodologies for SoC and SiP, p. 174-190. Springer, 1st Edition., 2010. ISBN: 978-3-642-12266-8
[book chap.] A. Nannarelli. "Low Power Hardware Platforms", Towards Green ICT, p. 131-143. River Publishers, Aalborg, Denmark. 2010. ISBN 978-87-92329-34-9.
2009
T. Lang and A. Nannarelli. "Division Unit for Binary Integer Decimals", Proc. of 20th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP '09), p. 1-7, Boston, USA. 7-9 July 2009.W. Liu, A. Calimera, A. Nannarelli, E. Macii, M. Poncino. "On-chip Thermal Modeling Based on SPICE Simulation", 19th International Workshop on Power And Timing Modeling, Optimization and Simulation PATMOS 2009, p. 66-75. Delft, Netherlands. Sept. 2009.
[invited] S. Gonzalez-Navarro, A. Nannarelli, C. Tsen, M. J. Schulte "Combined Decimal and Binary Floating-point Divider", Proc. of 43rd Asilomar Conference on Signals, Systems, and Computers, Pacific Grove (CA), USA. Nov. 2009.
M. Petricca, H. Li, S. Forchhammer, A. Nannarelli, M. Re, J. D. Andersen, G.C. Cardarilli. "Hardware Implementation of Real-Time MPEG Analysis and Deblocking for Video Enhancement", Proc. of 43rd Asilomar Conference on Signals, Systems, and Computers, Pacific Grove (CA), USA. Nov. 2009.
I. Shuli, M. Petricca, G.C. Cardarilli, A. Nannarelli, M. Re. "Multiple Constant Multiplication through Residue Number System", Proc. of 43rd Asilomar Conference on Signals, Systems, and Computers, Pacific Grove (CA), USA. Nov. 2009.
[invited] A. Nannarelli. "Low Power Hardware Platforms", 12th International Symposium on Wireless Personal Multimedia Communications (WPMC'09). Sendai, Japan. Sept. 7-10, 2009.
2008
W. Liu and A. Nannarelli. "Net Balanced Floorplanning Based on Elastic Energy Model", Proc. of 26th Norchip Conference, p. 258-263, Tallinn, Estonia. November 2008.W. Liu and A. Nannarelli. "Power Dissipation in Division", Proc. of 42nd Asilomar Conference on Signals, Systems, and Computers, p. 1790-1794. October 2008.
[invited] A. Nannarelli, M. Re, and G.C. Cardarilli, "Reducing Power Dissipation in Pipelined Accumulators", Proc. of 42nd Asilomar Conference on Signals, Systems, and Computers, p. 2098-2101. October 2008.
G.C. Cardarilli, A. Nannarelli and M. Re, "On the Comparison of Different Number Systems in the Implementation of Complex FIR Filters", Proc. of 16th IFIP/IEEE International Conference on Very Large Scale integration (VLSI-SoC), p. 37-41.October 2008.
L. Dadda and A. Nannarelli. "A Variant of a Radix-10 Combinational Multiplier", Proc. of 2008 IEEE International Symposium on Circuits and Systems (ISCAS), p. 3370-3373. Seattle, USA. May 18-21, 2008.
G.C. Cardarilli, L. Di Nunzio, A. Nannarelli and M. Re. "ADAPTO: Full-Adder Based Reconfigurable Architecture for Bit Level Operations", Proc. of 2008 IEEE International Symposium on Circuits and Systems (ISCAS), p. 3434-3437. Seattle, USA. May 18-21, 2008.
Alberto Nannarelli