@MASTERSTHESIS\{IMM2003-02033,
    author       = "O. Frandsen",
    title        = "Hardware based blind source separation for realtime signal processing",
    year         = "2003",
    keywords     = "Blind source separation, Temporal correlation, Joint diagonalization of matrices, Optimization by gradient descent, Singular mixing matrices, 
Limitations by fixpoint realization, Algorithm/system modelling, 
Test methods",
    school       = "Informatics and Mathematical Modelling, Technical University of Denmark, {DTU}",
    address      = "Richard Petersens Plads, Building 321, {DK-}2800 Kgs. Lyngby",
    type         = "",
    url          = "http://www2.compute.dtu.dk/pubdb/pubs/2033-full.html",
    abstract     = "The topic of this thesis is Blind Source Separation in context of hardware design. The demand for realtime processing enhances development of both sophisticated algorithms and advanced digital circuits. This project is based on Molgedey and Shusters time delay decorrelation algorithm. The gradient descent method is utilized to obtain independent components, and properties of the algorithm is investigated. Issues involved by converting floating point algorithms in Matlab to the fixed point domain of Hardware Description Languages is an aspect of the thesis. Synthizable {HDL} code is developed from a Simulink model by the System Generator toolbox.

In Danish:

Dette eksamensprojekt omhandler Blind Signal Separation i sammenh{\ae}ng med hardware design. Krav om realtids eksekvering fremmer udviklingen af b{\aa}de sofistikerede algoritmer som avancerede digitale kredsl{\o}b. Dette project er baseret p{\aa} Molgedey og Shusters tidsforsinkede korrelations algoritme. Gradient nedstignings metoden anvendes til at opn{\aa} uafh{\ae}ngige komponenter, og algoritmens egenskaber er unders{\o}gt. Problemstillinger omkring konvertering af floating point algoritmer i Matlab til fixed point dom{\ae}net i hardware beskrivende sprog, er en af aspekterne i dette afgangs projekt. Syntiserbar {HDL} kode er udviklet fra en Simlink model med v{\ae}rkt{\o}jet SystemGenerator."
}