@ARTICLE\{IMM2001-01012, author = "M. Fr{\"{a}}nzle and K. Lüth", title = "Visual Temporal Logic as a Rapid Prototying Tool", year = "2001", keywords = "Requirement capture, rapid prototyping, temporal logic, hardware synthesis.", pages = "93-113", journal = "Computer Languages", volume = "27", editor = "", number = "1-3", publisher = "Pergamon Press", url = "http://www2.compute.dtu.dk/pubdb/pubs/1012-full.html", abstract = "Within this survey article, we explain real-time symbolic timing diagrams and the {ICOS} tool-box supporting timing-diagram-based requirements capture and rapid prototyping. Real-time symbolic timing diagrams are a full-fledged metric-time temporal logic, but with a graphical syntax reminiscent of the informal timing diagrams widely used in electrical engineering. {ICOS} integrates a variety of tools, ranging from graphical specification editors over tautology checking and counterexample generation to code generators emitting C or {VHDL,} thus bridging the gap from formal specification to rapid prototype generation." }