High-level synthesis of asynchronous circuits from control data flow graph representations |
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| Type | Conference paper [Without referee] |
| Conference | Second ACiD-WG Workshop (of the european commission's fifth framework programme) |
| Year | 2002 |
| Publication link | http://www.scism.sbu.ac.uk/ccsv/ACiD-WG/Workshop2FP5/Programme/ |
| BibTeX data | [bibtex] |
| IMM Group(s) | Computer Science & Engineering |