A simple clockless Network-on-Chip for a commercial audio DSP chip |
| | Abstract | We design a very small, packet-switched, clockless Network-on-Chip (NoC) as a replacement for the existing crossbar-based communication infrastructure in a commercial audio DSP chip. Both solutions are laid out in a 0.18 um process, and compared in terms of area, power consumption and routing complexity. Even though the NoC turns out to be larger and more power consuming than the existing crossbar implementation, it still accounts for less than 1% of the total chip area and power consumption, and is justified by a long list of advantages: The NoC is modular, scalable, and in contrast to the existing crossbar, it allows all blocks to communicate. The total wire length is decreased by 22% which eases the layout process and makes the design less prone to routing congestion. Not least, the communicating blocks are decoupled by means of the NoC, providing a Globally-Asynchronous, Locally-Synchronous (GALS) system where independent clocking of the individual blocks is enabled. This study shows that NoCs are feasible even for small systems. | | Keywords | Network-on-Chip, on-chip network, asynchronous, clockless, application, System-on-Chip | | Type | Conference paper [With referee] | | Conference | Euromicro Conference on Digital System Design: Architectures, Methods and Tools | | Year | 2006 Month August | | ISBN / ISSN | 0769526098 | | BibTeX data | [bibtex] | | IMM Group(s) | Computer Science & Engineering |
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