@MASTERSTHESIS\{IMM2003-02861,
    author       = "N. A. J{\o}rgensen",
    title        = "Design of a low-power platform for running an embedded operating system",
    year         = "2003",
    school       = "Informatics and Mathematical Modelling, Technical University of Denmark, {DTU}",
    address      = "Richard Petersens Plads, Building 321, {DK-}2800 Kgs. Lyngby",
    type         = "",
    note         = "Advisor: Jan Madsen",
    url          = "http://www2.compute.dtu.dk/pubdb/pubs/2861-full.html",
    abstract     = "Two existing processor cores have been used as the foundation of a low-power platform for running the embedded operating system, TinyOS. 

The first core is a {MIPS} core written in SystemC. The processor was extended with a coprocessor for executing timer interrupts. The second core is an {AVR} core written originally in {VHDL}. The core was translated to SystemC and some entities were re-written. 

For verification, a hamming encoder program and a TinyOS application was executed on the platforms. The power consumption of the executions was measured using the Synopsys Power Compiler. For the {MIPS} core, a subsection of TinyOS was translated from {AVR} assembly to {MIPS} assembly. 

The {MIPS} platform was synthesized to an {FPGA} and verified. Both platforms were clock gated using the Synopsys Power Compiler. All {RTL} design is written with the SystemC {HDL}.

Sammenfatning p{\aa} dansk:

To eksisterende processorer er anvendt som grundlag for en lav-effekt platform til afvikling af det indlejrede operativsystem, TinyOS.

Den f{\o}rste processor er en {MIPS} processor skrevet i SystemC. Processoren blev udvidet med en coprocessor til afvikling af timer interrupts. Den anden processor er en {AVR} processor oprindeligt skrevet i {VHDL}. Processoren er oversat til SystemC og nogle entiteter er blevet omskrevet. 

Til verifikation, er et hamming kodning program og en TinyOS applikation blevet afviklet p{\aa} begge platforme. Str{\o}mforbruget under afvikling er m{\aa}lt med Synopsys Power Compiler. Til afvikling af TinyOS p{\aa} {MIPS} platformen, er en del af TinyOS blevet oversat fra {AVR} assembler til {MIPS} assembler.

{MIPS} platformen er syntetiseret til en {FPGA} og verificeret. Begge platforme er clock gated med Synopsys Power Compiler. Alt {RTL} design er skrevet med SystemC som {HDL}."
}