@MASTERSTHESIS\{IMM2003-01666,
    author       = "A. B. C. Hansen",
    title        = "Test and signalling for a 40Gbps transmitter/receiver prototype",
    year         = "2003",
    keywords     = "{PRBS,} {FPGA,} 40 Gbps, {LFSR,} Test and Signalling",
    school       = "Informatics and Mathematical Modelling, Technical University of Denmark, {DTU}",
    address      = "Richard Petersens Plads, Building 321, {DK-}2800 Kgs. Lyngby",
    type         = "",
    note         = "Supervisors: Flemming Stassen, Steen Pedersen",
    url          = "http://www2.compute.dtu.dk/pubdb/pubs/1666-full.html",
    abstract     = "Testing digital hardware often requires a high speed transmission and recep-tion of binary data. The transmitted test signal has to simulate the random characteristic of a digital signal, but at the same time it has to be predicable. Pseudo random binary sequences (PRBSs) fulfills just this, and are widely used for transmission tests. This thesis investigates the feasibility of imple-menting a 40 Gb/s {PRBS} test module, based on standard FPGAs, capable of generating test signals for a 40 Gb/s multiplex/demultiplex module. The entire design process, ranging from the initial overall demands, to the final tests conducted on the hardware, will be described. Error free transmission and reception of a 2 31 ¡ 1 {PRBS} on several of the data channels, will be demonstrated. It will be shown, that FPGAs indeed are viable choices for designs, that require high speed transmission and reception of data across a parallel interface."
}