Visual Temporal Logic as a Rapid Prototying Tool |
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| Abstract | Within this survey article, we explain real-time symbolic
timing diagrams and the ICOS tool-box supporting
timing-diagram-based requirements capture and rapid prototyping.
Real-time symbolic timing diagrams are a full-fledged metric-time
temporal logic, but with a graphical syntax reminiscent of the
informal timing diagrams widely used in electrical engineering.
ICOS integrates a variety of tools, ranging from graphical
specification editors over tautology checking and counterexample
generation to code generators emitting C or VHDL, thus bridging the
gap from formal specification to rapid prototype generation. |
| Keywords | Requirement capture, rapid prototyping, temporal logic, hardware synthesis. |
| Type | Journal paper [With referee] |
| Journal | Computer Languages |
| Year | 2001 Vol. 27 No. 1-3 pp. 93-113 |
| Publisher | Pergamon Press |
| BibTeX data | [bibtex] |
| IMM Group(s) | Computer Science & Engineering |