Date

V1.0 – 28 January 2008

02204 Design of asynchronous circuits

General course information (Spring 2008)

The purpose of this document is to provide information about the course to prospective students and others interested in the course. It is intended as a supplement to the course description in the DTU course catalogue.

For the daily communication during the semester we use the DTU-campusnet, and therefore the course resources are only available to students registered for the course.

Asynchronous circuits

Asynchronous circuits operate in a data-driven manner based on local handshaking between components. Asynchronous circuits have a number of characteristics and potential advantages some of which are:

– The fact that the individual registers are only clocked when and where necessary, can be exploited to reduce power consumption.

– The fact that registers are clocked at “random” points in time tends to reduce spikes in the supply current and in the electromagnetic noise emitted from the circuit.

– The fact that components use interface protocols with explicit timing protocols (rather than assuming an implicit global clock) increases modularity and robustness towards timing variability, and it can simplify the problem related to system-level timing closure.

– The fact that components indicate completion may lead to average case performance rather than worst case performance.

Aim of the course

Asynchronous design requires a different mental approach from that normally employed in clocked design, and attempts to take an existing clocked system and take out the clock and simply replace it with asynchronous handshaking is doomed to disappoint.

The aim of the course is to introduce the participants to asynchronous circuit design. The course will motivate the use of asynchronous circuits and teach the basic theory and concepts, such that the participants will be able to:

– Design asynchronous control- and data processing circuits of small and medium complexity.

– Read and understand the literature.

– Use typical CAD tools for asynchronous design.

– Decide where/whether to use asynchronous circuits in their next design.

Instructors:

Professor Jens Sparsø, amanuensis Sune F. Nielsen.

Lectures and Labs:

Mondays 13h :00-17h :00. Lectures are in 327 room 205. Labs are in 341 room 019.
Tentative lecture plan, spring 2008

Week #	Date	Topic	Instructor	Reading	Prob. /Lab
6	4 feb	Introduction + theory	JS	[1] Ch. 1+2	Prob. 1
7	11 feb	Theory + data flow	JS	[1] Ch 2+3	Prob. 2
8	18 feb	Performance (qualitative) Basic circuit implementation	JS	[1] Ch. 4.1-2 [1] Ch. 5	Prob. 3
9	25 feb	Performance (quantitative)	Matthias Bo Stuart	[1] Ch. 4.3-5	Prob. 4
10	3 mar	Control circuit synthesis	JS	[1] Ch. 6 Petrify manual + tutorial	Lab 1
11	10 mar	Control circuits synthesis	JS	[1] Ch. 6 Petrify manual + tutorial	Lab. 1 (cont)
12	17 mar	Easter vacation
13	24 mar	Easter vacation
14	31 mar	High level design (syntax directed translation)	SFN	[1] Ch. 8 Language manual + tutorial	Lab. 2
15	7 apr	High level design (syntax directed translation)	SFN	[1] Ch. 8 Language manual + tutorial	Lab. 2 (cont)
16	14 mar	Finish Labs 1 and 2. Project kickoff	JS + SFN		Labs.
17	21. apr	Advanced protocols and circuits	JS	[1] Ch.7	Prob. 5
18	28 apr	GALS and synchronization	JS		Project
19	5 may	Case studies + work on project	JS	articles	Project
20	13 may	Case studies + work on project	JS	articles	Project