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The ARTS website is of interest to all of you who want a system-level framework to model networked multi-processor systems-on-chip (MPSoC) and evaluate the crosslayer causality between the application, the operating system (OS) and the platform architecture.

In brief

Designing complex heterogeneous multiprocessor System-on-Chip (MPSoC) requires support for modeling and analysis of the different layers i.e. application, operating system (OS) and platform architecture. In this website, we presents an abstract system-level modeling framework, called ARTS, developed at Technical University of Denmark (DTU). ARTS supports the MPSoC designers in modeling the different layers and understanding their causalities. Significantly, our model captures the impact of dynamic and unpredictable OS behaviour on processor, memory and communication performance.

The ARTS framework takes (i) application models, described as task graphs, (ii) processor elements (PE), described in a database, and (ii) user defined architecture, described as ASCII file, as inputs. The SystemC implementation of the framework then instantiates and simulates the prescribed platform. The output is a set of ASCII files profiling runtime or final system characteristics, that allow the designer to investigate the merit of the solution.

Features

    Within the PE module:     Within the Communication module:
  • Application modelling
  • OS Scheduler (EDF and RM)
  • IO device drivers
  • IO ports (OCP 2.0 interface)
  • Network topology and protocol
  • Network adapters
  • IO ports (OCP 2.0 interface)

Usages

  1. MPSoC (with NoC) modelling
  2. Analysis of MPSoC Causality
  3. Investigate:
    • Processor and memory usage
    • Communication issues
    • Energy and peck power consumption

For additional information please email Prof. Jan Madsen at
jan(a)imm.dtu.dk

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